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9DB403D - Block Diagram
9DB403D - Pinout


4-output Differential Buffer For PCIe Gen1-2

The 9DB403 is compatible with the Intel DB400v2 Differential Buffer Specification. This buffer provides 4 PCI Express® Gen2 clocks. The 9DB403 is driven by a differential output pair from a CK410B+, CK505 or CK509B main clock generator.


  • 4 - 0.7 V current-mode differential output pairs
  • Supports zero delay buffer mode and fanout mode
  • Bandwidth programming available
  • 50-100 MHz operation in PLL mode
  • 50-400 MHz operation in Bypass mode
  • Spread spectrum modulation tolerant, 0 to -0.5% down spread and +/- 0.25% center spread.
  • Supports undriven differential outputs in PD# and SRC_STOP# modes for power management.
  • Outputs cycle-cycle jitter < 50 ps
  • Outputs skew: 50 ps
  • Phase jitter: PCIe Gen1 < 86 ps peak to peak
  • Phase jitter: PCIe Gen2 < 3.0/3.1 ps rms
  • 28-pin SSOP/TSSOP pacakge
  • Available in RoHS compliant packaging
  • Supports Commercial (0 to +70°C) and Industrial (-40 to +85°C) temperature ranges

Product Specification

Outputs (#)Output TypeOutput Freq Range (MHz)Input Freq (MHz)Inputs (#)Input TypeOutput Banks (#)Core Voltage (V)Output Voltage (V)
4HCSL33.000000 - 400.00000033.000000 - 400.0000001HCSL13.33.3

Product Options

Orderable Part IDPart StatusPkg. CodePkg. TypeLead Count (#)Temp. GradePb (Lead) FreeCarrier TypeSample & Buy
9DB403DFILFActivePYG28SSOP28IYesTubeCheck Availability
9DB403DFILFTActivePYG28SSOP28IYesReelCheck Availability
9DB403DFLFActivePYG28SSOP28CYesTubeCheck Availability
9DB403DFLFTActivePYG28SSOP28CYesReelCheck Availability
9DB403DGILFActivePGG28TSSOP28IYesTubeCheck Availability
9DB403DGILFTActivePGG28TSSOP28IYesReelCheck Availability
9DB403DGLFActivePGG28TSSOP28CYesTubeCheck Availability
9DB403DGLFTActivePGG28TSSOP28CYesReelCheck Availability


Technical Documentation

Title Type Format File Size Datesort icon
Datasheets & Errata
9DB403D Datasheet Datasheet PDF 194 KB Nov 1, 2012
Apps Notes & White Papers
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 13, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 12, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 8, 2014
show all (7)
AN-828 Termination - LVPECL Application Note PDF 229 KB May 1, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 24, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 24, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 15, 2014
IDT Clock Generation Overview Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview Overview PDF 3.79 MB Apr 25, 2016

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